A bi-directional link can be used in any situation where two devices must communicate with each other. A first communicating device can send data to a second communicating device, while the second communicating device can be sending data to the first communicating device. Conventional methods of simultaneously transmitting data between multiple devices included the use of separate unidirectional links between each driver and receiver. The advantages of bi-directional links over conventional methods include a reduction in the wiring between communicating devices, and a reduction in the number of connector pins on each communicating device.
Such a bi-directional link is disclosed in U.S. Pat. No. 5,216,667 issued on Jun. 1, 1993 to Chu et al. This reference describes a bi-directional transceiver for use on a full-duplex link. However, it uses a single wire for signaling, which has a limited tolerance to noise. Furthermore, a local reference voltage is required to compare with received signals.
Differential signaling is often used in signal transmission where undesirable electrical noise may be induced on the transmission line. Such electrical noise in single-wire signaling can cause the signal voltage to rise above or fall below its acceptable threshold voltage, resulting in faulty switching at the receiving end. Differential signaling, on the other hand, simultaneously transmits two signals that are complements of one another. The logic state of a particular bit of information transmitted by a differential signal can be determined by taking the difference of the two signals' voltage levels. Since these two signals are transmitted on physically adjacent transmission lines, electrical noise induced on one line is also induced on the other. Undesirable noise therefore may affect the two signals, but the difference between the two remains substantially the same. The advantages of differential signaling are well-known for conventional differential links.
A bi-directional link utilizing differential signaling is shown in U.S. Pat. No. 4,638,473, by Cooperman et al., issued Jan. 20, 1987. The Cooperman et al. differential design subtracts the differential line voltages in the receiver through the use of alternately switching capacitors. For proper operation, the capacitors must switch at about five times the transmission bit rate. This design substantially limits the data transfer rate, as the data rate can only be as high as one-fifth of the switching speed of the device technology.
Another differential bi-directional link is presented in U.S. Pat. No. 4,393,494, by Belforte et al., issued Jul. 12, 1983. The Belforte design uses external biasing voltages in providing current generators within the receiver. Also, the Belforte reference describes a driver circuit which relies on pull-down resistors to establish the low logic level of the transmitted signal.
The various embodiments of the present invention overcomes many of these problems. The data rate limitation of Cooperman et al. is avoided by utilizing a Complementary Metal-Oxide Semiconductor (CMOS) circuit rather than an alternating capacitor scheme as in the Belforte et al. reference. The CMOS technology provides for a bi-directional, differential link which reduces power consumption, and allows high data rate transfers. Furthermore, some embodiments of the present invention show a differential receiver that does not require additional internal or external biasing voltages, but rather implements a self-biasing scheme which greatly reduces the manufacturing difficulties associated with providing precise bias voltages, and may reduce receiver input counts where external bias voltages would be provided. A complementary receiver design offers an increased common mode noise tolerance. The complementary structure provides for a wide common mode range, ranging approximately from one power supply rail to the other. Constant voltage sources are also provided in the differential driver to generate the driver output signals to the bi-directional link. This provides an advantage over the use of pull-down resistors in that the magnitude of the transmitted signal can be reduced, and the required bias current is less than where pull-down resistors are used, which results in reduced power consumption.